Job Description We are seeking an engineer who is familiar with generative AI technologies and skilled in front-end digital design. This position focuses on applying cutting-edge commerical or open-source LLMs to various digital design processes, including RTL design, RTL optimization, simulation testbench generation, and formal testbench generation, to enhance automation and efficiency. You will collaborate with RTL designer, DV engineers, and AI experts to drive intelligent digital design. Additionally, you will be expected to study academic literature, develop and evaluate solutions, and write technical document, patents, or papers for submission.
#LI-LL1 Requirement Master’s degree or above in Electrical Engineering, Computer Science, Information Engineering, or related fields.
Familiarity with agentic AI platforms and techniques such as Claude code, roo code, opencode, agent skills, MCP, etc.
Knowledge of digital IC design flows, especially RTL design, Verilog/System Verilog, simulation, and formal verification.
Familiar with retrieval augmented generation.
Knowledge or experience in EDA tools and design automation processes.
Skills in Python, AI API integration, and basic fine-tuning.
Strong communication skills and team spirit.
