Role Description:
A System-on-Chip (So C) Design Engineer is responsible for designing, developing, integrating, and verifying integrated circuits that combine multiple IPs into a single chip. The role involves collaboration across various functional areas, including digital design, verification and physical design.

Key responsibilities:
Essential functions and duties of this position include but are not limited to the following:
• Architecture & Specification:
• Define and document system requirements.
• Develop architectural specifications for the So C design.
• RTL (Register-Transfer Level) Design:
• Write Verilog RTL code.
• Integrate IPs into So C.
• Implement design logic to meet performance, power, and area goals.
• Clock structure and IOMUX planning.
• RTL and netlist sanity check.
• IP Integration:
• Integrate third-party and internally developed IP blocks (CPU cores, GPUs, DSPs, memory interfaces).
• Validate IP functionality and ensure compatibility within the So C.
• Verification collaboration:
• Co-work with verification team for bug fix.
• Physical design collaboration:
• Collaborate with physical designers for synthesis, and timing closure.
• Optimize designs for power, area, and timing constraints.

Requirements: 
. Education background: Master degree in EE or CSIE fields.
. Minimum experience: No experience is ok.
. Similar or other experiences:
• With digital IP design experience is plus. 
• With working experience in international IC design house is plus.
• With ISO- experience is plus.
. Skills: 
• English (good in reading, writing and conversion)
• Verilog coding.
• Scripting languages.
• IC design flow knowledge.
• Documentation.