Job Description1. Wi-Fi architecture and digital circuit design
2. Whole chip clock, test, and reset plan.
3. Low power digital design
4. So C chip integration from RTL to gate level including timing closure and testability
5. Design methodology and integration flow improvement Requirement1. Better to have chip integration experience
2. Familiar with front-end or back-end implementation flow and related EDA tools
3. Familiar with clock/MTCMOS/power/reset control design
4. Familiar with Low power design and Low power analyze tool.
