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Senior Verification Engineer, Hsinchu

發表 2024-11-20
過期 2024-12-20
ID #2463362560
Free
Senior Verification Engineer, Hsinchu
Taiwan, 新竹縣, 新竹,
發表 November 20, 2024

描述

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years.

It’s a unique legacy of innovation that’s fueled by great technology—and amazing people.

Today, we’re tapping into the unlimited potential of AI to define the next era of computing.

An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world.

Doing what’s never been done before takes vision, innovation, and the world’s best talent.

As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work.

Come join the team and see how you can make a lasting impact on the world.

We are looking for a senior verification engineer for the Multimedia IP team in Taiwan.

The team is involved in IP developments for multiple SOC product lines.

In this position, you will have the chance to work on multimedia IP's for our SOC chips.

What you will be doing: Verification of our display subsystem/IP.

Work with Architect, Design, SOC teams to define verification scope, strategies, test planning, and verify designs at both block level and full chip level.

Develop verification infrastructure.

What we need to see: Masters Degree in EE, CS or CE or equivalent work experience.3+ years of industry experience.

Proficiency with System Verilog, UVM, C/C++.

Experience with verification of multimedia IP at block level, subsystem level, or full chip level.

Deep understanding of verification concepts.

Outstanding analytical skills and problem-solving skills.

Good written and verbal communication skills.

Ways to stand out from the crowd: Experience with verification of display subsystem/IP.

Familiarity with So C concepts such as CPU, memory, interconnects, clock/reset, security, etc.

Ability to analyze architecture and micro-architecture spec and define test plan.

Experience in writing C++/System C models.

Proficient scripting experience in Python, Perl, tcl, Make, shell.

職位詳情

工作類型: 全職
合同類型: 永恆的
薪酬類型: 每月
職業: Senior verification engineer

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