Job Description1. Design verification of Ser Des in I/O Chiplet to collaborate with analog/digital/algorithm design teams from prototype testchip to mass production.
2. Responsible for implementing Ser Des firmware design used for link performance validation and mass production tests.
3. Responsible for establishing automatic test and data analysis for Ser Des silicon charaterization and failed chip analysis
#LI-DC3 Requirement1. Master's degree in electrical engineering, communication, or equivalent.
2. Knowledgeable about Wireline Communication principle, such as Ser Des, USB, PCIe, MIPI, and etc.
3. Experience with firmware driver design
4. Knowledgeable about analog or digital Frontend principle, such as Rx, Tx, PLL, CDR, EQ, and etc is plus
5. Experience with automated test development is a plus
