Job Description Fully custom layout design or layout automation for analog & RF circuit, foundation IP, or silicon interposer, etc.

Requirement1.

Bachelor's or Master's in a closely related field, e.g., EE, CE, CS, etc.2.

Minimum 3 years relevant industrial experience in analog/RF layout.3.

Proficient in fully custom layout design & layout verification for analog/RF circuit.4.

Proficient in layout implementation & verification tools, such as, Virtuoso, Calibre, Laker, Custom Compiler, etc.5.

Experience in advanced Fin FET process nodes.6.

Programming skills to automate routines by using Python, Perl, Shell scripts, etc.

is a plus.7.

A strong team player able to work with others as well as working independently.8.

Good communication skill in English to work with global teams.